Designing with FPGAs and CPLDs
暫譯: FPGA 與 CPLD 設計指南

Bob Zeidman

  • 出版商: CMP Books
  • 出版日期: 2002-01-09
  • 售價: $2,810
  • 貴賓價: 9.5$2,670
  • 語言: 英文
  • 頁數: 240
  • 裝訂: Paperback
  • ISBN: 1578201128
  • ISBN-13: 9781578201129
  • 相關分類: FPGA
  • 已過版

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商品描述

  • Choose the right programmable logic devices and development tools
  • Understand the design, verification, and testing issues
  • Plan schedules and allocate resources efficiently

Choose the right programmable logic devices with this guide to the technologies and internal architectures of Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs). This complete reference is written in easy-to-understand language intended for engineers who are planning a CPLD-based or FPGA-based design; managers who need to plan, schedule, and budget a CPLD-based or FPGA-based design; and board-level designers who need to design CPLDs or FPGAs into a product. Experienced designers will find well-structured guidelines for future projects. The author explains the entire procedure for designing these devices from specification through production.

Programmable logic devices are explained in an overview, leading up to a detailed description of CPLDs and FPGAs. The various architectures are examined thoroughly along with the tradeoffs - allowing you to decide which particular device is right for your design. Engineers learn about important design, verification, synthesis, and testing issues for producing an optimized and reliable design as well as the different Electronic Design Automation (EDA) tools available. Engineering managers learn how to use the step-by-step Universal Design Methodology (UDM) to optimally allocate resources and to schedule and budget the development process accurately.

Table of Contents

Foreword

Preface

Acknowledgments

Chapter 1 Prehistory: Programmable Logic to ASICs

Chapter 2 Complex Programmable Logic Devices (CPLDs)

Chapter 3 Field Programmable Gate Arrays (FPGAs)

Chapter 4 Universal Design Methodology for Programmable Devices

Chapter 5 Design Techniques, Rules, and Guidelines

Chapter 6 Verification

Chapter 7 Electronic Design Automation Tools

Chapter 8 Today and The Future

Appendix A Answer Key

Appendix B Verilog Code for Schematics in Chapter 6

Glossary

References

About the Author

Index

商品描述(中文翻譯)

- 選擇合適的可程式邏輯裝置和開發工具
- 了解設計、驗證和測試問題
- 有效規劃時間表和資源分配

選擇合適的可程式邏輯裝置,這本指南涵蓋了現場可程式邏輯閘陣列(Field Programmable Gate Arrays, FPGAs)和複雜可程式邏輯裝置(Complex Programmable Logic Devices, CPLDs)的技術和內部架構。這本完整的參考書以易於理解的語言撰寫,旨在幫助計劃基於CPLD或FPGA設計的工程師、需要計劃、排程和預算CPLD或FPGA設計的管理者,以及需要將CPLD或FPGA設計納入產品的板級設計師。經驗豐富的設計師將會發現未來專案的良好結構指導。作者解釋了從規格到生產的整個設計過程。

可程式邏輯裝置的概述將引導您深入了解CPLD和FPGA的詳細描述。各種架構將被徹底檢視,並考量其權衡,讓您能夠決定哪一種特定裝置最適合您的設計。工程師將學習到生產優化和可靠設計的重要設計、驗證、合成和測試問題,以及可用的各種電子設計自動化(Electronic Design Automation, EDA)工具。工程管理者將學會如何使用逐步的通用設計方法(Universal Design Methodology, UDM)來最佳化資源分配,並準確地排程和預算開發過程。

**目錄**

前言
序言
致謝
第1章 前史:可程式邏輯到ASIC
第2章 複雜可程式邏輯裝置(CPLDs)
第3章 現場可程式邏輯閘陣列(FPGAs)
第4章 可程式裝置的通用設計方法
第5章 設計技術、規則和指導方針
第6章 驗證
第7章 電子設計自動化工具
第8章 現在與未來
附錄A 答案鍵
附錄B 第6章原理圖的Verilog程式碼
詞彙表
參考文獻
關於作者
索引