Embedded Software Verification and Debugging
暫譯: 嵌入式軟體驗證與除錯

Lettnin, Djones, Winterholer, Markus

  • 出版商: Springer
  • 出版日期: 2018-07-19
  • 售價: $5,380
  • 貴賓價: 9.5$5,111
  • 語言: 英文
  • 頁數: 208
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 1493979310
  • ISBN-13: 9781493979318
  • 相關分類: 嵌入式系統
  • 海外代購書籍(需單獨結帳)

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商品描述

This book provides comprehensive coverage of verification and debugging techniques for embedded software, which is frequently used in safety critical applications (e.g., automotive), where failures are unacceptable. Since the verification of complex systems needs to encompass the verification of both hardware and embedded software modules, this book focuses on verification and debugging approaches for embedded software with hardware dependencies. Coverage includes the entire flow of design, verification and debugging of embedded software and all key approaches to debugging, dynamic, static, and hybrid verification. This book discusses the current, industrial embedded software verification flow, as well as emerging trends with focus on formal and hybrid verification and debugging approaches.

商品描述(中文翻譯)

本書全面涵蓋嵌入式軟體的驗證與除錯技術,這些技術常用於安全關鍵應用(例如:汽車),在這些應用中,失敗是不可接受的。由於複雜系統的驗證需要涵蓋硬體和嵌入式軟體模組的驗證,本書專注於具有硬體依賴性的嵌入式軟體的驗證與除錯方法。內容包括嵌入式軟體的設計、驗證和除錯的整個流程,以及所有關鍵的除錯方法,包括動態驗證、靜態驗證和混合驗證。本書討論當前的工業嵌入式軟體驗證流程,以及新興趨勢,重點在於形式驗證和混合驗證與除錯方法。

作者簡介

Markus Winterholer has been involved in system design and HW/SW development for more than 20 years. Most recently he has been focused on developing and testing software for the financial sector and e-government solutions in Switzerland. Before, he was responsible for the development of several generations of embedded software debug and verification solutions at Cadence for more than ten years. Furthermore, he also deployed advanced verification methodologies including application of constrained random techniques. Before he joined Cadence, he worked five years as a freelancer offering consulting services for hardware and software development and verification focusing on leading edge communication standards and processors. Markus Winterholer holds a diploma degree in computer science from the University of Tübingen.

Djones Lettnin has a Master's in Electric Engineering at the Catholic University of Rio Grande do Sul (2004), Brazil, and a PhD. in Computer Engineering at the Eberhard Karls University of Tübingen (2009), Germany. Since August 2011, he has been a Professor at Federal University of Santa Catarina, Brazil. He works in many cooperation projects with Cadence Design Systems, Freescale, Bosch, and Intel. He is also the coordinator of the Cadence Academic Network in Latin America. His main interests are in design and functional verification of hardware and embedded software with a main focus on: EDA, modeling of embedded systems, digital design, verification based on assertions, and semiformal and formal verification using model checking.

作者簡介(中文翻譯)

Markus Winterholer 在系統設計和硬體/軟體開發方面已有超過20年的經驗。最近,他專注於為瑞士的金融領域和電子政府解決方案開發和測試軟體。在此之前,他在Cadence負責多代嵌入式軟體除錯和驗證解決方案的開發,長達十年以上。此外,他還部署了先進的驗證方法,包括約束隨機技術的應用。在加入Cadence之前,他曾擔任自由工作者,提供硬體和軟體開發及驗證的諮詢服務,專注於前沿的通信標準和處理器。Markus Winterholer 擁有圖賓根大學的計算機科學學位。

Djones Lettnin 擁有巴西南大河州天主教大學的電機工程碩士學位(2004年)和德國圖賓根大學的計算機工程博士學位(2009年)。自2011年8月以來,他一直是巴西聖卡塔琳娜聯邦大學的教授。他參與了與Cadence Design Systems、Freescale、Bosch和Intel的多個合作項目。他也是拉丁美洲Cadence學術網絡的協調員。他的主要研究興趣在於硬體和嵌入式軟體的設計和功能驗證,主要集中在:電子設計自動化(EDA)、嵌入式系統建模、數位設計、基於斷言的驗證,以及使用模型檢查的半形式和正式驗證。