Hardware Security: Design, Threats, and Safeguards
暫譯: 硬體安全：設計、威脅與防護措施

Beginning with an introduction to cryptography, Hardware Security: Design, Threats, and Safeguards explains the underlying mathematical principles needed to design complex cryptographic algorithms. It then presents efficient cryptographic algorithm implementation methods, along with state-of-the-art research and strategies for the design of very large scale integrated (VLSI) circuits and symmetric cryptosystems, complete with examples of Advanced Encryption Standard (AES) ciphers, asymmetric ciphers, and elliptic curve cryptography (ECC).

Gain a Comprehensive Understanding of Hardware Security―from Fundamentals to Practical Applications

Since most implementations of standard cryptographic algorithms leak information that can be exploited by adversaries to gather knowledge about secret encryption keys, Hardware Security: Design, Threats, and Safeguards:

• Details algorithmic- and circuit-level countermeasures for attacks based on power, timing, fault, cache, and scan chain analysis
• Describes hardware intellectual property piracy and protection techniques at different levels of abstraction based on watermarking
• Discusses hardware obfuscation and physically unclonable functions (PUFs), as well as Trojan modeling, taxonomy, detection, and prevention

Design for Security and Meet Real-Time Requirements

If you consider security as critical a metric for integrated circuits (ICs) as power, area, and performance, you’ll embrace the design-for-security methodology of Hardware Security: Design, Threats, and Safeguards.