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商品描述
Techniques for Optimizing Multiprocessor Implementations of Signal Processing Applications
An indispensable component of the information age, signal processing is embedded in a variety of consumer devices, including cell phones and digital television, as well as in communication infrastructure, such as media servers and cellular base stations. Multiple programmable processors, along with custom hardware running in parallel, are needed to achieve the computation throughput required of such applications.
Reviews important research in key areas related to the multiprocessor implementation of multimedia systems
Embedded Multiprocessors: Scheduling and Synchronization, Second Edition presents architectures and design methodologies for parallel systems in embedded digital signal processing (DSP) applications. It discusses application modeling techniques for multimedia systems, the incorporation of interprocessor communication costs into multiprocessor scheduling decisions, and a modeling methodology (the synchronization graph) for multiprocessor system performance analysis. The book also applies the synchronization graph model to develop hardware and software optimizations that can significantly reduce the interprocessor communication overhead of a given schedule.
Chronicles recent activity dealing with single-chip multiprocessors and dataflow models
This edition updates the background material on existing embedded multiprocessors, including single-chip multiprocessors. It also summarizes the new research on dataflow models for signal processing that has been carried out since the publication of the first edition.
Harness the power of multiprocessors
This book explores the optimization of interprocessor communication and synchronization in embedded multiprocessor systems. It shows you how to design multiprocessor computer systems that are streamlined for multimedia applications.
商品描述(中文翻譯)
《多處理器實現信號處理應用的優化技術》
信號處理是信息時代不可或缺的組成部分,嵌入在各種消費者設備中,包括手機和數字電視,以及通信基礎設施,如媒體服務器和蜂窩基站。為了實現這些應用所需的計算吞吐量,需要多個可編程處理器以及並行運行的定制硬件。
《嵌入式多處理器:調度和同步,第二版》回顧了與多媒體系統的多處理器實現相關的關鍵領域的重要研究。它介紹了嵌入式數字信號處理(DSP)應用中的並行系統架構和設計方法。討論了多媒體系統的應用建模技術,將處理器間通信成本納入多處理器調度決策,以及用於多處理器系統性能分析的建模方法(同步圖)。該書還應用同步圖模型開發了硬件和軟件優化方法,可以顯著減少給定調度的處理器間通信開銷。
本版更新了現有嵌入式多處理器的背景材料,包括單芯片多處理器。它還總結了自第一版出版以來在信號處理的數據流模型方面進行的新研究。
本書探討了嵌入式多處理器系統中處理器間通信和同步的優化。它向您展示如何設計針對多媒體應用進行優化的多處理器計算機系統。