Systematic Design of Sigma-Delta Analog-to-Digital Converters
暫譯: σ-Δ類比轉數位轉換器的系統化設計

Description:

Systematic Design of Sigma-Delta Analog-to-Digital Converters describes the issues related to the sigma-delta analog-to-digital converters (ADCs) design in a systematic manner: from the top level of abstraction represented by the filters defining signal and noise transfer functions (STF, NTF), passing through the architecture level where topology-related performance is calculated and simulated, and finally down to parameters of circuit elements like resistors, capacitors, and amplifier transconductances used in individual integrators. The systematic approach allows the evaluation of different loop filters (order, aggressiveness, discrete-time or continuous-time implementation) with quantizers varying in resolution. Topologies explored range from simple single loops to multiple cascaded loops with complex structures including more feedbacks and feedforwards. For differential circuits, with switched-capacitor integrators for discrete-time (DT) loop filters and active-RC for continuous-time (CT) ones, the passive integrator components are calculated and the power consumption is estimated, based on top-level requirements like harmonic distortion and noise budget.
This unified, systematic approach to choosing the best sigma-delta ADC implementation for a given design target yields an interesting solution for a high-resolution, broadband (DSL-like) ADC operated at low oversampling ratio, which is detailed down to transistor-level schematics.
The target audience of Systematic Design of Sigma-Delta Analog-to-Digital Converters are engineers designing sigma-delta ADCs and/or switched-capacitor and continuous-time filters, both beginners and experienced. It is also intended for students/academics involved in sigma-delta and analog CAD research.

Table of Contents:

1: Introduction. 1.1. Analog-to-Digital Conversion. 1.2. Motivation. 1.3. Book Organization. 2: Architecture-Level Analysis of Sigma-Delta ADCs. 2.1. Principle and Operation. 2.2. Sigma-Delta ADCs with Discrete-Time Loop Filters. 2.3. Sigma-Delta ADCs with Continuous-Time Loop Filters. 3: Discrete-Time Circuit Design. 3.1. Switched-Capacitor Integrators. 3.2. Switched-Capacitor Amplifiers. 3.3. Quantizer. 3.4. Multibit, SC Digital-to-Analog Converters. 4: Continuous-Time Circuit Design. 4.1. Active RC Integrator. 4.2. Quantizer. 4.3. Digital-to-Analog Converters. 5: Computer Aided Design of Sigma-Delta ADCs. 5.1. Filter-Level Design. 5.2. Architecture-Level Design. 5.3. design Examples. 6: Sigma-Delta ADC for Audio Applications. 6.1. The Electret Microphone. 6.2. System Design. 6.3. Sigma-Delta ADC Design. 6.4. Linearity Analysis. 6.5. Experimental Results. 7: Broadband, High Dynamic Range Sigma-Delta ADC. 7.1. Project Specifications. 7.2. CAD-Assisted Design Optimization. 7.3. Design of the 16-bit CT Integrator. 7.4. Design of the 14-bit CT Integrator. 7.5. Higher Order Integrators. 7.6. Feed-Forwards Adder and 31-levels Quantizer. 7.7. Calibration of Current-Mode CT DAC. 7.8. Transistor-Level Simulation Results.