Methodology for the Digital Calibration of Analog Circuits and Systems : with Case Studies (Hardcover)
暫譯: 類比電路與系統的數位校準方法論:案例研究 (精裝版)

Marc Pastre, Maher Kayal

  • 出版商: Springer
  • 出版日期: 2005-12-06
  • 售價: $1,600
  • 貴賓價: 9.8$1,568
  • 語言: 英文
  • 頁數: 254
  • 裝訂: Hardcover
  • ISBN: 1402042523
  • ISBN-13: 9781402042522
  • 已絕版

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商品描述

Description

Methodology for the Digital Calibration of Analog Circuits and Systems shows how to relax the extreme design constraints in analog circuits, allowing the realization of high-precision systems even with low-performance components. A complete methodology is proposed, and three applications are detailed.

To start with, an in-depth analysis of existing compensation techniques for analog circuit imperfections is carried out. The M/2+M sub-binary digital-to-analog converter is thoroughly studied, and the use of this very low-area circuit in conjunction with a successive approximations algorithm for digital compensation is described. A complete methodology based on this compensation circuit and algorithm is then proposed. The detection and correction of analog circuit imperfections is studied, and a simulation tool allowing the transparent simulation of analog circuits with automatic compensation blocks is introduced.

The first application shows how the sub-binary M/2+M structure can be employed as a conventional digital-to-analog converter if two calibration and radix conversion algorithms are implemented.

The second application, a SOI 1T DRAM, is then presented. A digital algorithm chooses a suitable reference value that compensates several circuit imperfections together, from the sense amplifier offset to the dispersion of the memory read currents.

The third application is the calibration of the sensitivity of a current measurement microsystem based on a Hall magnetic field sensor. Using a variant of the chopper modulation, the spinning current technique, combined with a second modulation of a reference signal, the sensitivity of the complete system is continuously measured without interrupting normal operation. A thermal drift lower than 50 ppm/°C is achieved, which is 6 to 10 times less than in state-of-the-art implementations. Furthermore, the calibration technique also compensates drifts due to mechanical stresses and ageing.

Table of contents

List of Figures. List of Tables.
1 Introduction.
1.1 Context. 1.2 Objectives. 1.3 Compensation methodology. 1.4 Applications of the compensation methodology. 1.5 Book organization. 
2 Autocalibration and compensation techniques. 2.1 Introduction. 2.2 Matching. 2.3 Chopper stabilization. 2.4 Autozero. 2.5 Correlated double sampling. 2.6 Ping-pong. 2.7 Other techniques. 2.8 Classification. 2.9 Conclusion.
3 Digital compensation circuits and sub-binary digital-to-analog converters. 3.1 Introduction. 3.2 Digital compensation. 3.3 Successive approximations. 3.4 Sub-binary radix DACs. 3.5 Component arrays. 3.6 Current sources. 3.7 R/2R ladders. 3.8 Linear current division using MOS transistors. 3.9 M/2M ladders. 3.10 R/xR ladders. 3.11 M/2+M ladders. 3.12 Comparison. 3.13 Linear DACs based on M/2+M converters. 3.14 Conclusion.
4 Methodology for current-mode digital compensation of analog circuits. 4.1 Introduction. 4.2 Two-stage Miller operational amplifier. 4.3 Compensation current technique. 4.4 Simulation with digital compensation circuits. 4.5 Application to SOI 1T DRAM calibration. 4.6 Conclusion.
5 Hall microsystem with continuous digital gain calibration. 5.1 Introduction. 5.2 Integrated Hall sensors. 5.3 Spinning current technique. 5.4 Sensitivity calibration of Hall sensors. 5.5 Hall sensor microsystems. 5.6 Continuous digital gain calibration technique. 5.7 Conclusion.
6 Implementation of the Hall microsystem with continuous calibration. 6.1 Introduction. 6.2 Hall sensor array. 6.3 Preamplifier. 6.4 Demodulators. 6.5 Delta-sigma modulator. 6.6 System improvements. 6.7 System integration. 6.8 Conclusion.
7 Conclusion. 7.1 Highlights. 7.2 Main contributions. 7.3 Perspectives.
References.
Index.

商品描述(中文翻譯)

**描述**

《模擬電路與系統的數位校準方法論》展示了如何放寬模擬電路中的極端設計限制,使得即使使用低性能元件也能實現高精度系統。提出了一個完整的方法論,並詳細介紹了三個應用。

首先,對現有的模擬電路不完美補償技術進行深入分析。對 M/2+M 子二進位數位類比轉換器進行了徹底研究,並描述了這個非常低面積電路與數位補償的逐次逼近演算法的結合使用。然後,基於這個補償電路和演算法提出了一個完整的方法論。研究了模擬電路不完美的檢測和修正,並引入了一個模擬工具,允許透明地模擬帶有自動補償區塊的模擬電路。

第一個應用展示了如何在實現兩個校準和基數轉換演算法的情況下,將子二進位 M/2+M 結構用作傳統的數位類比轉換器。

接下來介紹第二個應用,即 SOI 1T DRAM。一個數位演算法選擇一個合適的參考值,該值能夠一起補償多個電路不完美,從感測放大器的偏移到記憶體讀取電流的分散。

第三個應用是基於霍爾磁場感測器的電流測量微系統的靈敏度校準。使用一種變體的切換調變技術,結合參考信號的第二次調變,持續測量整個系統的靈敏度而不干擾正常操作。實現了低於 50 ppm/°C 的熱漂移,這比最先進的實現低 6 到 10 倍。此外,該校準技術還補償由機械應力和老化引起的漂移。

**目錄**

圖表清單。表格清單。
1 引言。1.1 背景。1.2 目標。1.3 補償方法論。1.4 補償方法論的應用。1.5 書籍組織。
2 自動校準和補償技術。2.1 引言。2.2 匹配。2.3 切換穩定化。2.4 自動歸零。2.5 相關雙重取樣。2.6 乒乓技術。2.7 其他技術。2.8 分類。2.9 結論。
3 數位補償電路和子二進位數位類比轉換器。3.1 引言。3.2 數位補償。3.3 逐次逼近。3.4 子二進位基數 DAC。3.5 元件陣列。3.6 電流源。3.7 R/2R 梯形電路。3.8 使用 MOS 晶體管的線性電流分配。3.9 M/2M 梯形電路。3.10 R/xR 梯形電路。3.11 M/2+M 梯形電路。3.12 比較。3.13 基於 M/2+M 轉換器的線性 DAC。3.14 結論。
4 基於電流模式的模擬電路數位補償方法論。4.1 引言。4.2 兩級米勒運算放大器。4.3 補償電流技術。4.4 使用數位補償電路的模擬。4.5 應用於 SOI 1T DRAM 校準。4.6 結論。
5 具有連續數位增益校準的霍爾微系統。5.1 引言。5.2 集成霍爾感測器。5.3 旋轉電流技術。5.4 霍爾感測器的靈敏度校準。5.5 霍爾感測器微系統。5.6 連續數位增益校準技術。5.7 結論。
6 具有連續校準的霍爾微系統的實現。6.1 引言。6.2 霍爾感測器陣列。6.3 前置放大器。6.4 解調器。6.5 Delta-sigma 調變器。6.6 系統改進。6.7 系統整合。6.8 結論。
7 結論。7.1 重點。7.2 主要貢獻。7.3 前景。
參考文獻。
索引。

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