Quantum-Dot Cellular Automata Circuits for Nanocomputing Applications
暫譯: 量子點細胞自動機電路在奈米計算應用中的應用

這本書提供了一個針對量子點細胞自動機（Quantum-Dot Cellular Automata, QCA）電路的最佳邏輯設計的綜合解決方案。內容包括新邏輯函數和新穎數位電路設計的基本知識、量子計算與QCA的應用、量子及量子啟發算法和應用的新趨勢，以及支持QCA設計師的算法。

《量子點細胞自動機電路在納米計算中的未來發展》涵蓋了基於QCA的新型納米電子架構，這些架構有助於在物理實現層面改善邏輯計算和信息流。書中討論了設計方法論，以獲得一些基本邏輯電路的最佳佈局，考慮到關鍵指標，如導線延遲、單元數量和電路面積，這些指標有助於在物理實現層面改善邏輯計算和信息流。還探討了QCA技術面臨的幾個挑戰，如時鐘機制、便於製造的平面佈局，以及設計和製造的電子設計自動化（Electronic Design Automation, EDA）工具，如模擬、綜合、測試等。

本書旨在為電子和計算機學科的學生和研究人員提供參考，特別是對於這個快速變化的領域感興趣的讀者，涵蓋新興納米技術及其架構、低功耗數位設計等課程。這項工作也將幫助製造公司/行業專業人士，以及納米技術和半導體工程師在低功耗量子計算機的開發中。

Dr. Trailokya Nath Sasamal is currently working as Assistant Professor in the Department of Electronics & Communication Engineering at National Institute of Technology, Kurukshetra, India since August 2013. He has more than 11 years research and teaching experience in various University systems of India. Dr. Sasamal has obtained Ph.D. degree from the Department of Electronics & Communication Engineering, NIT Kurukshetra, Haryana. He obtained his M. Tech degree in Electronics Engineering from Indian Institute of Technology, Banaras Hindu University, Varanasi, India. He obtained his B. Tech degree in Electronics & Telecommunication from the KEC, Bhubaneswar, India, in 2007. He has presented and published over 60 research papers in reputed journals and various national and international conferences. His research interests include Quantum-dot Cellular Automata, Reversible logic, and new architectures for emerging nano-devices. He is the author of the book "Quantum-Dot Cellular Automata Based Digital Logic Circuits: A Design Perspective", published in Springer. He is also involved in reviewing processes in different journals and conferences such as; IEEE, IET, JCSC, IETE, DSJ etc.

Dr. Hari Mohan Gaur is currently working with the School of Computer Science Engineering and Technology at Bennett University, Greater Noida, India. He obtained Ph.D from National Institute of Technology Kurukshetra (NIT-KKR) in Reversible and Quantum Computation. Hari Mohan Gaur has more than 15 years of experience in academic, research and administrative capacities. He is a distinguished Researcher, well known in Academic Fraternity for his interdisciplinary research in the areas of Quantum Computation, Fault Tolerant Digital Design, IOT and Data Security in Cloud Environment. Dr. Gaur holds the credit of contribution in several quality research journals of international repute published by IEEE, ACM, IET, Elsevier, etc. He is having a wide exposure of handling research proposals, international conferences, Training and Faculty Development Programs. He is involved in a joint research group involving eminent professors from top universities of US, UK, Japan, Taiwan and Malaysia. He has also been editor and reviewer of several international journals and is a member of IEEE since 2017.

Prof. Ashutosh Kumar Singh is an esteemed researcher and academician in the domain of Electrical and Computer engineering. Currently, he is working as a Professor; Department of Computer Applications; National Institute of Technology; Kurukshetra, India. He has more than 20 years research, teaching and administrative experience in various University systems of the India, UK, Australia and Malaysia. Dr. Singh obtained his Ph. D. degree in Electronics Engineering from Indian Institute of Technology-BHU, India; Post Doc from Department of Computer Science, University of Bristol, United Kingdom and Charted Engineer from United Kingdom. He is the recipient of Japan Society for the Promotion of Science (JSPS) fellowship for visit in University of Tokyo and other universities of Japan. His research area includes Verification, Synthesis, Design and Testing of Digital Circuits, Predictive Data Analytics, Data Security in Cloud, Web Technology. He has more than 350 publications till now which includes peer reviewed journals, books, conferences, book chapters and news magazines in these areas. He has co-authored eight books including "Web Spam Detection Application using Neural Network", "Digital Systems Fundamentals" and "Computer System Organization & Architecture". Prof. Singh has worked as principal investigator/investigator for six sponsored research projects and was a key member on a project from EPSRC (United Kingdom) entitled "Logic Verification and Synthesis in New Framework". Dr. Singh has visited several countries including Australia, United Kingdom, South Korea, China, Thailand, Indonesia, Japan and USA for collaborative research work, invited talks and to present his research work. He had been entitled for 15 awards such as Merit Awards-2003 (Institute of Engineers), Best Poster Presenter-99 in 86th Indian Science Congress held in Chennai, INDIA, Best Paper Presenter of NSC'99 INDIA and Bintulu Development Authority Best Postgraduate Research Paper Award for 2010, 2011, 2012.

Prof. Xiaoqing Wen (Fellow, IEEE) received the B.E. degree from Tsinghua University, China, in 1986, the M.E. degree from Hiroshima University, Japan, in 1990, and the Ph.D. degree from Osaka University, Japan, in 1993. From 1993 to 1997, he was an Assistant Professor at Akita University, Japan. He was a Visiting Researcher at the University of Wisconsin, Madison, USA, from October 1995 to March 1996. He joined SynTest Technologies, Inc., USA, in 1998, and served as its Chief Technology Officer until 2003. In 2004, he joined the Kyushu Institute of Technology, Japan, where he is currently a Professor and the Chair of the Department of Creative Informatics. He founded the Dependable Integrated Systems Research Center in 2015 and served as its Director until 2017. He has co-authored and co-edited two books: VLSI Test Principles and Architectures: Design for Testability (Morgan Kaufmann, 2006) and Power-Aware Testing and Test Strategies for Low Power Devices (Springer, 2009). He holds 43 U.S. patents and 14 Japanese patents on VLSI testing. His research interests include VLSI test, diagnosis, and testable design. He is a member of the IEICE, the IPSJ, and the REAJ. He received the 2008 IEICE-ISS Best Paper Award for his pioneering work on X-filling-based low-capture-power test generation. He has/is served/serving as an Associate Editor for the IEEE Transactions on Computer- Aided Design, the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, and the Journal of Electronic Testing: Theory and Applications

Dr. Trailokya Nath Sasamal 自2013年8月以來，擔任印度庫魯克舍特拉國立技術學院電子與通信工程系的助理教授。他在印度各大學系統擁有超過11年的研究和教學經驗。Sasamal博士在哈里亞納邦的庫魯克舍特拉國立技術學院電子與通信工程系獲得博士學位。他在印度瓦拉納西的印度理工學院（Banaras Hindu University）獲得電子工程碩士學位，並於2007年在印度布巴內斯瓦爾的KEC獲得電子與電信工程學士學位。他在知名期刊和各種國內外會議上發表和出版了超過60篇研究論文。他的研究興趣包括量子點細胞自動機、可逆邏輯以及新興納米設備的新架構。他是書籍《基於量子點細胞自動機的數位邏輯電路：設計視角》的作者，該書由Springer出版。他還參與了IEEE、IET、JCSC、IETE、DSJ等不同期刊和會議的審稿工作。

Dr. Hari Mohan Gaur 目前在印度大諾伊達的班奈特大學計算機科學工程與技術學院工作。他在庫魯克舍特拉國立技術學院（NIT-KKR）獲得可逆和量子計算的博士學位。Hari Mohan Gaur在學術、研究和行政職位上擁有超過15年的經驗。他是一位傑出的研究者，在學術界以其跨學科的研究而聞名，研究領域包括量子計算、容錯數位設計、物聯網和雲環境中的數據安全。Gaur博士在IEEE、ACM、IET、Elsevier等國際知名期刊上發表了多篇高品質研究論文。他在處理研究提案、國際會議、培訓和教師發展計劃方面擁有廣泛的經驗。他參與了一個聯合研究小組，該小組包括來自美國、英國、日本、台灣和馬來西亞的著名教授。他自2017年以來是IEEE的成員，並擔任多個國際期刊的編輯和審稿人。

Prof. Ashutosh Kumar Singh 是電氣與計算機工程領域的知名研究者和學者。目前，他擔任印度庫魯克舍特拉國立技術學院計算機應用系的教授。他在印度、英國、澳大利亞和馬來西亞的各大學系統中擁有超過20年的研究、教學和行政經驗。Singh博士在印度理工學院-BHU獲得電子工程博士學位，並在英國布里斯托大學計算機科學系獲得博士後學位，還是英國的特許工程師。他曾獲得日本學術振興會（JSPS）獎學金，前往東京大學及其他日本大學訪問。他的研究領域包括數位電路的驗證、綜合、設計和測試、預測數據分析、雲中的數據安全和網絡技術。他至今已發表超過350篇論文，包括同行評審的期刊、書籍、會議、書籍章節和新聞雜誌。他共同撰寫了八本書籍，包括《使用神經網絡的網絡垃圾郵件檢測應用》、《數位系統基礎》和《計算機系統組織與架構》。Singh教授曾擔任六個贊助研究項目的首席研究員/研究員，並在一個來自英國EPSRC的項目中擔任關鍵成員，該項目名為「新框架中的邏輯驗證與綜合」。Singh博士曾前往澳大利亞、英國、南韓、中國、泰國、印尼、日本和美國等多個國家進行合作研究、受邀演講和展示他的研究成果。他曾獲得15項獎項，包括2003年工程師學會的優異獎、1999年在印度金奈舉行的第86屆印度科學大會的最佳海報演講者、NSC'99印度最佳論文演講者以及2010、2011、2012年Bintulu發展局最佳研究生論文獎。

Prof. Xiaoqing Wen（IEEE Fellow）於1986年獲得中國清華大學的工學學士學位，1990年獲得日本廣島大學的工學碩士學位，1993年獲得日本大阪大學的博士學位。1993年至1997年，他在日本秋田大學擔任助理教授。1995年10月至1996年3月，他在美國威斯康辛大學麥迪遜分校擔任訪問研究員。1998年，他加入美國SynTest Technologies, Inc.，並擔任首席技術官，直到2003年。2004年，他加入日本九州科技大學，目前擔任創意資訊學系的教授和系主任。他於2015年創立了可靠集成系統研究中心，並擔任其主任直到2017年。他共同撰寫和編輯了兩本書籍：《VLSI測試原則與架構：可測試性設計》（Morgan Kaufmann，2006年）和《低功耗設備的功耗測試與測試策略》（Springer，2009年）。他擁有43項美國專利和14項日本專利，專注於VLSI測試。他的研究興趣包括VLSI測試、診斷和可測試設計。他是IEICE、IPSJ和REAJ的成員。他因其在基於X填充的低捕獲功率測試生成方面的開創性工作而獲得2008年IEICE-ISS最佳論文獎。他曾擔任IEEE計算機輔助設計期刊、IEEE超大規模集成（VLSI）系統期刊和電子測試期刊的副編輯。