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商品描述
The text covers nanoscale semiconductor materials, device models, and applications for circuits design in a single volume. It will be a useful reference text for graduate students, and academic researchers in diverse areas such as electrical engineering, electronics and communication engineering, nanoscience and nanotechnology.
商品描述(中文翻譯)
本書涵蓋了納米尺度半導體材料、設備模型以及電路設計的應用，內容集中於單一卷冊中。對於研究生及在電機工程、電子與通信工程、納米科學和納米技術等多個領域的學術研究者來說，這將是一本有用的參考書籍。
作者簡介
Dr. Balwinder Raj (MIEEE'2006) earned his B. Tech, Electronics Engineering (PTU Jalandhar), M. Tech-Microelectronics (PU Chandigarh) and Ph.D-VLSI Design (IIT Roorkee), India in 2004, 2006 and 2010 respectively. For further research work, European Commission awarded him "Erasmus Mundus" Mobility of Life research fellowship for postdoc research work at University of Rome, Tor Vergata, Italy in 2010-2011. Dr. Raj received India4EU (India for European Commission) Fellowship and worked as visiting researcher at KTH University, Stockholm, Sweden, Oct-Nov 2013. He also visited Aalto University Finland as visiting researcher during June 2017.Currently, he is working as Associate Professor at National Institute of Technical Teachers Training and Research Chandigarh, India since Dec 2019. Earlier, he was worked at National Institute of Technology (NIT Jalandhar), Punjab, India from May 2012 to Dec 2019. Dr. Raj also worked as Assistant Professor at ABV-IIITM Gwalior (An autonomous institute established by Ministry of HRD, Govt. of India) July 2011 to April 2012. He received Best Teacher Award from Indian Society for Technical Education (ISTE) New Delhi in 26th July 2013. Dr. Raj received Young Scientist Award from Punjab Academy of Sciences during 18th Punjab Science Congress held on 9th Feb 2015. He also received a research paper award in an international conference on Electrical and Electronics Engineering held at Pattaya, Thailand from 11th to 12th July 2015. Dr. Raj has authored/co-authored 3 books, 8 book chapters and more than 70 research papers in peer reviewed international/national journals and conferences. His areas of interest in research are Classical/Non-Classical Nanoscale Semiconductor Device Modeling; Nanoelectronic and their applications in hardware security, sensors and circuit design, FinFET based Memory design, Low Power VLSI Design, Digital/Analog VLSI Design and FPGA implementation.
Dr Ashish Raman earned his B.E, Electronics and Communication Engineering, M. Tech-Microelectronics and VLSI Design (Shri G S Institute of Technology and Science, Indore) and Ph.D-VLSI Design (NIT Jalandhar), India in 2003, 2005 and 2015 respectively. Currently, he is working as Assistant Professor at National Institute of Technology, Jalandhar, India since Sep 2007. Earlier, he was worked at National Institute of Technology (NIT Jalandhar), Durgapur, India from January 2007 to August 2007. Dr. Raman has authored/co-authored 1 book, 5 book chapters and more than 50 research papers in peer reviewed international/national journals and conferences. His areas of interest in research are VLSI Circuit Design, Nanoscale Semiconductor Device; Nanoelectronic, Modeling, Low Power VLSI Design, Digital/Analog VLSI Design and FPGA implementation, Sensor and circuit applications. He is working as principal investigator of various funded projects such as SMDP-C2SD sponsored by MeitY, FIST Sponsored by DST, FPGA based High Speed CCSDS Processor for Baseband Receiver, Funded by ISRO Banglore, and many more projects. Dr. Raman is a member of the IEEE Electron Devices Society, the IEEE Solid-State Circuits Society, and the Institution of Engineers Society, India
作者簡介(中文翻譯)
Dr. Balwinder Raj (MIEEE'2006) 於 2004、2006 和 2010 年分別獲得印度 PTU Jalandhar 的電子工程學士學位、PU Chandigarh 的微電子碩士學位以及 IIT Roorkee 的 VLSI 設計博士學位。為了進一步的研究工作，歐洲委員會於 2010-2011 年授予他「Erasmus Mundus」生命流動研究獎學金，以進行在意大利羅馬托爾維爾加大學的博士後研究。Dr. Raj 獲得 India4EU（印度為歐洲委員會）獎學金，並於 2013 年 10 月至 11 月在瑞典斯德哥爾摩的 KTH 大學擔任訪問研究員。他於 2017 年 6 月期間作為訪問研究員造訪芬蘭阿爾托大學。目前，他自 2019 年 12 月起在印度昌迪加爾的國立技術教師培訓與研究所擔任副教授。此前，他於 2012 年 5 月至 2019 年 12 月在印度旁遮普的國立技術學院（NIT Jalandhar）工作。Dr. Raj 於 2011 年 7 月至 2012 年 4 月擔任 ABV-IIITM Gwalior（由印度人力資源發展部設立的自主機構）的助理教授。他於 2013 年 7 月 26 日獲得印度技術教育學會（ISTE）頒發的最佳教師獎。Dr. Raj 在 2015 年 2 月 9 日舉行的第 18 屆旁遮普科學大會上獲得旁遮普科學院的青年科學家獎。他還在 2015 年 7 月 11 日至 12 日於泰國芭堤雅舉行的國際電氣與電子工程會議上獲得研究論文獎。Dr. Raj 已發表或合著 3 本書、8 篇書章以及 70 多篇在同行評審的國際/國內期刊和會議上發表的研究論文。他的研究興趣領域包括經典/非經典納米尺度半導體器件建模；納米電子學及其在硬體安全、傳感器和電路設計中的應用，基於 FinFET 的記憶體設計，低功耗 VLSI 設計，數位/類比 VLSI 設計和 FPGA 實現。
Dr. Ashish Raman 獲得電子與通信工程學士學位、微電子與 VLSI 設計碩士學位（印度 Indore 的 Shri G S Institute of Technology and Science）以及 VLSI 設計博士學位（NIT Jalandhar）於 2003、2005 和 2015 年分別取得。目前，他自 2007 年 9 月起在印度 Jalandhar 的國立技術學院擔任助理教授。此前，他於 2007 年 1 月至 8 月在印度 Durgapur 的國立技術學院（NIT Jalandhar）工作。Dr. Raman 已發表或合著 1 本書、5 篇書章以及 50 多篇在同行評審的國際/國內期刊和會議上發表的研究論文。他的研究興趣領域包括 VLSI 電路設計、納米尺度半導體器件；納米電子學、建模、低功耗 VLSI 設計、數位/類比 VLSI 設計和 FPGA 實現、傳感器和電路應用。他擔任多個資助項目的主要研究員，例如由 MeitY 贊助的 SMDP-C2SD、由 DST 贊助的 FIST、由 ISRO Bangalore 資助的基於 FPGA 的高速 CCSDS 處理器等多個項目。Dr. Raman 是 IEEE 電子器件學會、IEEE 固態電路學會及印度工程師學會的成員。
