A Verilog HDL Primer, Third Edition

Bhasker, J.

A Verilog HDL Primer, Third Edition
  • 出版商: Star Galaxy Publishing
  • 出版日期: 2018-05-27
  • 售價: $3,460
  • 貴賓價: 9.5 折 $3,287
  • 語言: 英文
  • 頁數: 400
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 0984629246
  • ISBN-13: 9780984629244
  • 相關分類: Verilog

    • 立即出貨 (庫存=1)

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商品描述

With this book, you can: 1. Learn Verilog HDL the fast and easy way. 2. Obtain a thorough understanding of the basic building blocks of Verilog HDL. 3. Find out how to model hardware. 4. Find out how to test the hardware model using a test bench.

商品描述(中文翻譯)

這本書可以幫助您：1. 快速且輕鬆地學習Verilog HDL。2. 充分理解Verilog HDL的基本構建模塊。3. 學習如何建模硬件。4. 學習如何使用測試台架測試硬件模型。

作者簡介

Bhasker is an Architect at eSilicon Corporation. He was a Distinguished Member of Technical Staff at Bell Laboratories, Lucent Technologies. He has taught VHDL and Verilog HDL at Lucent Technologies for more than four years. He has written four other books on hardware description languages and synthesis including the best-selling books "A VHDL Primer" and "Verilog HDL Synthesis, A Practical Primer." Bhasker has a Ph.D. in Computer Science from the University of Minnesota, M.Tech. in Computer Technology and a B.Tech. in Electrical Engineering from the Indian Institute of Technology, New Delhi.

作者簡介(中文翻譯)

Bhasker是eSilicon Corporation的架構師。他曾是Bell Laboratories, Lucent Technologies的傑出技術人員。他在Lucent Technologies教授VHDL和Verilog HDL超過四年。他還撰寫了其他四本關於硬體描述語言和合成的書籍，包括暢銷書《A VHDL Primer》和《Verilog HDL Synthesis, A Practical Primer》。Bhasker在明尼蘇達大學獲得計算機科學博士學位，並在印度理工學院新德里分校獲得計算機技術碩士學位和電機工程學士學位。

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