A Verilog HDL Primer, Third Edition
暫譯: Verilog HDL 入門，第三版

Bhasker, J.

A Verilog HDL Primer, Third Edition
  • 出版商: Star Galaxy Publishing
  • 出版日期: 2018-05-27
  • 售價: $3,460
  • 貴賓價: 9.5 折 $3,287
  • 語言: 英文
  • 頁數: 400
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 0984629246
  • ISBN-13: 9780984629244
  • 相關分類: Verilog

    • 立即出貨 (庫存=1)

買這商品的人也買了...

相關主題

商品描述

With this book, you can: 1. Learn Verilog HDL the fast and easy way. 2. Obtain a thorough understanding of the basic building blocks of Verilog HDL. 3. Find out how to model hardware. 4. Find out how to test the hardware model using a test bench.

商品描述(中文翻譯)

這本書讓您可以：1. 以快速且簡單的方式學習 Verilog HDL。2. 徹底了解 Verilog HDL 的基本構建塊。3. 瞭解如何建模硬體。4. 知道如何使用測試平台測試硬體模型。

作者簡介

Bhasker is an Architect at eSilicon Corporation. He was a Distinguished Member of Technical Staff at Bell Laboratories, Lucent Technologies. He has taught VHDL and Verilog HDL at Lucent Technologies for more than four years. He has written four other books on hardware description languages and synthesis including the best-selling books "A VHDL Primer" and "Verilog HDL Synthesis, A Practical Primer." Bhasker has a Ph.D. in Computer Science from the University of Minnesota, M.Tech. in Computer Technology and a B.Tech. in Electrical Engineering from the Indian Institute of Technology, New Delhi.

作者簡介(中文翻譯)

Bhasker 是 eSilicon Corporation 的架構師。他曾是貝爾實驗室（Bell Laboratories）、盧森特科技（Lucent Technologies）的傑出技術成員。他在盧森特科技教授 VHDL 和 Verilog HDL 超過四年。他還撰寫了四本有關硬體描述語言和綜合的書籍，包括暢銷書《A VHDL Primer》和《Verilog HDL Synthesis, A Practical Primer》。Bhasker 擁有明尼蘇達大學的計算機科學博士學位，並在印度理工學院新德里獲得計算機技術碩士學位和電氣工程學士學位。

類似商品