System-on-a-Chip Verification - Methodology and Techniques (Hardcover)
Prakash Rashinkar, Peter Paterson, Leena Singh
- 出版商: Kluwer Academic Publ
- 出版日期: 2000-12-31
- 售價: $1,050
- 貴賓價: 9.8 折 $1,029
- 語言: 英文
- 頁數: 372
- 裝訂: Hardcover
- ISBN: 0792372794
- ISBN-13: 9780792372790
-
相關分類:
Bluetooth、電子學 Eletronics
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相關主題
商品描述
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:
- Explanation of the objective involved in performing verification after a given design step;
- Features of options available;
- When to use a particular option;
- How to select an option; and
- Limitations of the option.
This exciting new book will be of interest to all designers and test professionals.
Contents
1: Introduction.
2: System-Level Verification.
3: Block-Level Verification.
4: Analog/Mixed Signal Simulation.
5: Simulation.
6: Hardware/Software Co-verification.
7: Static Netlist Verification.
8: Physical Verification and Design Sign-off.
商品描述(中文翻譯)
《System-On-a-Chip Verification: Methodology and Techniques》是第一本涵蓋SOC驗證策略和方法論的書籍,從系統層級驗證到設計確認都有涵蓋。所涵蓋的主題包括SOC設計和驗證方面的介紹,簡要介紹系統層級驗證,區塊層級驗證,類比/混合信號模擬,模擬,硬體/軟體協同驗證,靜態網表驗證,物理驗證以及簡要介紹設計確認。所有驗證方面都以一個藍牙應用的參考設計作為示例。《System-On-a-Chip Verification: Methodology and Techniques》採用系統化的方法,每章都涵蓋驗證策略的以下方面:
1. 在完成特定設計步驟後進行驗證的目標解釋;
2. 可用選項的特點;
3. 何時使用特定選項;
4. 如何選擇選項;以及
5. 選項的限制。
這本令人興奮的新書將對所有設計師和測試專業人員都很有興趣。
目錄:
1: 引言。
2: 系統層級驗證。
3: 區塊層級驗證。
4: 類比/混合信號模擬。
5: 模擬。
6: 硬體/軟體協同驗證。
7: 靜態網表驗證。
8: 物理驗證和設計確認。