ESD: Design and Synthesis (Hardcover)
暫譯: ESD:設計與合成(精裝版)
Steven H. Voldman
- 出版商: Wiley
- 出版日期: 2011-04-25
- 定價: $4,200
- 售價: 9.0 折 $3,780
- 語言: 英文
- 頁數: 290
- 裝訂: Hardcover
- ISBN: 0470685719
- ISBN-13: 9780470685716
-
相關分類:
電子商務 E-commerce、電子學 Eletronics、電路學 Electric-circuits
立即出貨 (庫存=1)
買這商品的人也買了...
-
$6,740$6,403 -
$880$695 -
$1,600$1,568 -
$2,080$2,038 -
$380$323 -
$680$578 -
$530$350 -
$860$731 -
$1,050The Rootkit Arsenal: Escape and Evasion in the Dark Corners of the System (Paperback)
-
$650$553 -
$820$697 -
$620$484 -
$450$351 -
$650$553 -
$580$199 -
$850$672 -
$750$495 -
$450$351 -
$950$751 -
$490$382 -
$600$510 -
$380$323 -
$620$527 -
$1,800$1,764 -
$1,911ESD: Analog Circuits and Design (Hardcover)
相關主題
商品描述
Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics.
This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a ‘top-down' design approach.
Look inside for extensive coverage on:
- integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integration
- architecturing of mixed voltage, mixed signal, to RF design for ESD analysis
- floorplanning for peripheral and core I/O designs, and the implications on ESD and latchup
- guard ring integration for both a ‘bottom-up' and ‘top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to core
- classification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chip
- examples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart power
- practical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics
ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips.
It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era.
商品描述(中文翻譯)
靜電放電(ESD)持續影響半導體元件和系統,隨著技術從微電子學擴展到奈米電子學。
本書從整體晶片的ESD設計合成方法研究電氣過壓、ESD和鎖存現象。它提供了從一般ist的角度對ESD保護網絡整合的清晰見解,隨後提供特定技術、電路和晶片的範例。獨特的是,半導體晶片整合問題和ESD網絡的樓層規劃均從「自上而下」的設計方法進行探討。
本書深入涵蓋以下主題:
- 在DRAM、SRAM、CMOS影像處理晶片、微處理器、類比產品、RF元件中,核心、電源匯流排和信號引腳的整合,以及這種整合如何影響ESD設計和整合
- 混合電壓、混合信號到RF設計的架構,以進行ESD分析
- 外圍和核心I/O設計的樓層規劃,以及對ESD和鎖存現象的影響
- 針對I/O保護環、ESD保護環、I/O到I/O及I/O到核心的「自下而上」和「自上而下」方法的保護環整合
- ESD功率鉗和ESD信號引腳電路的分類,以及如何為特定半導體晶片做出正確選擇
- 討論的尖端技術的ESD設計範例,包括CMOS、BiCMOS、絕緣體上的矽(SOI)、雙極技術、高壓CMOS(HVCMOS)、RF CMOS和智能電源
- 理解ESD電路功率分配、接地規則開發、內部匯流排分配、電流路徑分析、質量指標的實用方法
《ESD: 設計與合成》是作者關於ESD保護系列書籍的延續。它是ESD、電路和半導體工程師;設計合成團隊領導者;佈局設計、特性化、樓層規劃、測試和可靠性工程師;技術人員;以及半導體晶片製造和設計中的接地規則和測試場地開發者的重要參考資料。
本書對於電機工程、半導體科學和製造科學的研究生和本科生,以及涉及ESD設備、晶片和系統設計的課程也非常有用。這本書提供了對現代技術面臨的問題的有用見解,隨著我們進入奈米電子時代。