Practical FPGA Programming in C (Hardcover)
暫譯: C語言實用FPGA編程 (精裝版)
David Pellerin, Scott Thibault
- 出版商: Prentice Hall
- 出版日期: 2005-05-02
- 售價: $2,975
- 貴賓價: 9.5 折 $2,826
- 語言: 英文
- 頁數: 472
- 裝訂: Paperback
- ISBN: 0131543180
- ISBN-13: 9780131543188
-
相關分類:
C 程式語言、FPGA
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商品描述
Table of Contents:
Foreword by Clive "Max" Maxfield.
Why is this book of interest to the hardware folks?
And what about the software guys and gals?
So what's the catch?
Preface.
C Language for FPGA-Based Hardware Design?
Compelling Platforms for Software Acceleration.
The Power to Experiment.
How This Book Is Organized.
Where This Book Came From.
Acknowledgments/
1. The FPGA as a Computing Platform.
A Quick Introduction to FPGAs.
FPGA-Based Programmable Hardware Platforms.
Increasing Performance While Lowering Costs.
The Role of Tools.
The FPGA as an Embedded Software Platform.
The Importance of a Programming Abstraction.
When Is C Language Appropriate for FPGA Design?
How to Use This Book.
2. A Brief History of Programmable Platforms.
The Origins of Programmable Logic.
Reprogrammability, HDLs, and the Rise of the FPGA.
Systems on a Programmable Chip.
FPGAs for Parallel Computing.
Summary.
3. A Programming Model for FPGA-Based Applications.
Parallel Processing Models.
FPGAs as Parallel Computing Machines.
Programming for Parallelism.
Communicating Process Programming Models.
The Impulse C Programming Model.
Summary.
4. An Introduction to Impulse C.
The Motivation Behind Impulse C.
The Impulse C Programming Model.
A Minimal Impulse C Program.
Processes, Streams, Signals, and Memory.
Impulse C Signed and Unsigned Datatypes.
Understanding Processes.
Understanding Streams.
Using Output Streams.
Using Input Streams.
Avoiding Stream Deadlocks.
Creating and Using Signals.
Understanding Registers.
Using Shared Memories.
Memory and Stream Performance Considerations.
Summary.
5. Describing a FIR Filter.
Design Overview.
The FIR Filter Hardware Process.
The Software Test Bench.
Desktop Simulation.
Application Monitoring.
Summary.
6. Generating FPGA Hardware.
The Hardware Generation Flow.
Understanding the Generated Structure.
Stream and Signal Interfaces.
Using HDL Simulation to Understand Stream Protocols.
Debugging the Generated Hardware.
Hardware Generation Notes.
Making Efficient Use of the Optimizers.
Language Constraints for Hardware Processes.
Summary.
7. Increasing Statement-Level Parallelism.
A Model of FPGA Computation.
C Language Semantics and Parallelism.
Exploiting Instruction-Level Parallelism.
Limiting Instruction Stages.
Unrolling Loops.
Pipelining Explained.
Summary.
8. Porting a Legacy Application to Impulse C.
The Triple-DES Algorithm.
Converting the Algorithm to a Streaming Model.
Performing Software Simulation.
Compiling to Hardware.
Preliminary Hardware Analysis.
Summary.
9. Creating an Embedded Test Bench.
A Mixed Hardware and Software Approach.
The Embedded Processor as a Test Generator.
The Role of Hardware Simulators.
Testing the Triple-DES Algorithm in Hardware.
Software Stream Macro Interfaces.
Building the Test System.
Summary.
10. Optimizing C for FPGA Performance.
Rethinking an Algorithm for Performance.
Refinement 1: Reducing Size by Introducing a Loop.
Refinement 2: Array Splitting.
Refinement 3: Improving Streaming Performance.
Refinement 4: Loop Unrolling.
Refinement 5: Pipelining the Main Loop.
Summary.
11. Describing System-Level Parallelism.
Design Overview.
Performing Desktop Simulation.
Refinement 1: Creating Parallel 8-Bit Filters.
Refinement 2: Creating a System-Level Pipeline.
Moving the Application to Hardware.
Summary.
12. Combining Impulse C with an Embedded Operating System.
The uClinux Operating System.
A uClinux Demonstration Project.
Summary.
13. Mandelbrot Image Generation.
Design Overview.
Expressing the Algorithm in C.
Creating a Fixed-Point Equivalent.
Creating a Streaming Version.
Parallelizing the Algorithm.
Future Refinements.
Summary.
14. The Future Of FPGA Computing.
The FPGA as a High-Performance Computer.
The Future of FPGA Computing.
Summary.
Appendix A. Getting the Most Out of Embedded FPGA Processors.
FPGA Embedded Processor Overview.
Peripherals and Memory Controllers.
Increasing Processor Performance.
Optimization Techniques That Are Not FPGA-Specific.
FPGA-Specific Optimization Techniques.
Summary.
Appendix B. Creating a Custom Stream Interface.
Application Overview.
The DS92LV16 Serial Link for Data Streaming.
Stream Interface State Machine Description.
Data Transmission.
Summary.
Appendix C. Impulse C Function Reference.
Appendix D. Triple-Des Source Listings.
Appendix E. Image Filter Listings.
Appendix F. Selected References.
Index.
商品描述(中文翻譯)
目錄:
克萊夫·“麥克斯”·麥克斯菲爾德的前言。
為什麼這本書對硬體人員有興趣?
那麼軟體人員呢?
那麼有什麼陷阱呢?
前言。
FPGA 基礎的硬體設計中的 C 語言?
用於軟體加速的引人注目的平台。
實驗的力量。
本書的組織方式。
本書的來源。
致謝/
1. FPGA 作為計算平台。
FPGA 簡介。
基於 FPGA 的可程式硬體平台。
在降低成本的同時提高性能。
工具的角色。
FPGA 作為嵌入式軟體平台。
程式抽象的重要性。
何時適合使用 C 語言進行 FPGA 設計?
如何使用本書。
2. 可程式平台的簡史。
可程式邏輯的起源。
可重程式性、HDL 和 FPGA 的興起。
可程式晶片上的系統。
用於平行計算的 FPGA。
總結。
3. FPGA 基礎應用的程式模型。
平行處理模型。
FPGA 作為平行計算機。
為平行性編程。
通訊過程程式模型。
Impulse C 程式模型。
總結。
4. Impulse C 介紹。
Impulse C 背後的動機。
Impulse C 程式模型。
一個最小的 Impulse C 程式。
過程、流、信號和記憶體。
Impulse C 的有符號和無符號數據類型。
理解過程。
理解流。
使用輸出流。
使用輸入流。
避免流死鎖。
創建和使用信號。
理解寄存器。
使用共享記憶體。
記憶體和流性能考量。
總結。
5. 描述 FIR 濾波器。
設計概述。
FIR 濾波器硬體過程。
軟體測試平台。
桌面模擬。
應用監控。
總結。
6. 生成 FPGA 硬體。
硬體生成流程。
理解生成的結構。
流和信號介面。
使用 HDL 模擬來理解流協議。
調試生成的硬體。
硬體生成注意事項。
有效利用優化器。
硬體過程的語言限制。
總結。
7. 增加語句級平行性。
FPGA 計算模型。
C 語言語義和平行性。
利用指令級平行性。
限制指令階段。
展開迴圈。
管線化解釋。
總結。
8. 將遺留應用程式移植到 Impulse C。