Nanoscale CMOS VLSI Circuits: Design for Manufacturability (Hardcover)

Sandip Kundu, Aswin Sreedhar

Nanoscale CMOS VLSI Circuits: Design for Manufacturability (Hardcover)
  • 出版商: McGraw-Hill Education
  • 出版日期: 2010-07-15
  • 售價: $1,980
  • 貴賓價: 9.5 折 $1,881
  • 語言: 英文
  • 頁數: 316
  • 裝訂: Hardcover
  • ISBN: 007163519X
  • ISBN-13: 9780071635196
  • 相關分類: CMOS、VLSI

    • 立即出貨 (庫存 < 3)

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商品描述

Cutting-Edge CMOS VLSI Design for Manufacturability Techniques

This detailed guide offers proven methods for optimizing circuit designs to increase the yield, reliability, and manufacturability of products and mitigate defects and failure. Covering the latest devices, technologies, and processes, Nanoscale CMOS VLSI Circuits: Design for Manufacturability focuses on delivering higher performance and lower power consumption. Costs, constraints, and computational efficiencies are also discussed in the practical resource.

Nanoscale CMOS VLSI Circuits covers:

  • Current trends in CMOS VLSI design
  • Semiconductor manufacturing technologies
  • Photolithography
  • Process and device variability: analyses and modeling
  • Manufacturing-Aware Physical Design Closure
  • Metrology, manufacturing defects, and defect extraction
  • Defect impact modeling and yield improvement techniques
  • Physical design and reliability
  • DFM tools and methodologies

商品描述(中文翻譯)

「先進的CMOS VLSI設計製造技術」詳細指南提供了優化電路設計的方法，以增加產品的產量、可靠性和製造能力，並減少缺陷和故障。《奈米級CMOS VLSI電路：設計製造能力》專注於提供更高性能和更低功耗的最新設備、技術和流程。此實用資源還討論了成本、限制和計算效率。

《奈米級CMOS VLSI電路》涵蓋以下內容：
- CMOS VLSI設計的當前趨勢
- 半導體製造技術
- 光刻技術
- 製程和器件變異性：分析和建模
- 製造感知的物理設計閉合
- 測量、製造缺陷和缺陷提取
- 缺陷影響建模和產量改善技術
- 物理設計和可靠性
- DFM工具和方法論

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